-------------------------------------------------------------------------------
-- cache_ent.vhd
-------------------------------------------------------------------------------
--
-- This file is part of SKUMLI.
-- Copyright (C) 2011 Davide Giuseppe Monaco (black.ralkass@gmail.com)
--
-- SKUMLI is free software: you can redistribute it and/or modify
-- it under the terms of the GNU General Public License as published by
-- the Free Software Foundation, either version 3 of the License, or
-- (at your option) any later version.
--
-- SKUMLI is distributed in the hope that it will be useful,
-- but WITHOUT ANY WARRANTY; without even the implied warranty of
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-- GNU General Public License for more details.
--
-- You should have received a copy of the GNU General Public License
-- along with SKUMLI.  If not, see <http://www.gnu.org/licenses/>.
--
-------------------------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
-------------------------------------------------------------------------------
entity cache is

  generic ( N : integer := 32 );

  port (
    -- control signals
    rw      : in  std_logic;                        -- H: write; L: read
    cs      : in  std_logic;                        -- chip select

    -- input signals
    addr    : in  std_logic_vector(N - 1 downto 0); -- address
    din     : in  std_logic_vector(N - 1 downto 0); -- data in (data or instr.)
    set_v   : in  std_logic;                        -- H: set
    din_src : in  std_logic;                        -- H: CPU (set dirty bit)

    -- output signals
    rdy     : out std_logic;                        -- ready
    hit     : out std_logic;                        -- H: hit; L: miss
    tout    : out std_logic_vector(24 downto 0);    -- current block [TAG V D]
    dout0   : out std_logic_vector(N - 1 downto 0); -- data out (data or instr.)
    dout1   : out std_logic_vector(N - 1 downto 0); -- data out (data or instr.)
    dout2   : out std_logic_vector(N - 1 downto 0); -- data out (data or instr.)
    dout3   : out std_logic_vector(N - 1 downto 0)  -- data out (data or instr.)
  );

end cache;
